岗位职责:
1.Design, evaluate and verify CMOS analog circuits ( PLL、DDR、USB、HDMI、ADAC、VDAC);
2.Oversee layout and verification activities which include floor plan, LVS and DRC.
任职要求:
1.Bachelor degree or Master degree in ASIC Design Relevant;
2.Experience in RF/Analog IC design;
3.Good fundamental in analysis and design of analog / mixed-signal circuits;
4.Experience in Verilog, AHDL and/or Matlab;
5.Ability to do layout and provide verification/debugging guidance;
6.Solid knowledge of EDA design tools (Analog artist, spectre, HSPICE and nc-verilog ...);
7.Familiar with Computer languages such as C, C++, perl;
8.Experience in any of the following areas is preferred: PLL, high-speed I/O’s;
9.Good communication skills and Good oral/written English.
福利待遇: